%0 Journal Article
%T Simulation of a cyclic redundant encoder for data transmission  by Ethernet II frames in the Xilinx Vivado environment
%A Aminev, D..
%A Zaharzhevskiy, S..
%A Kozyrev, D..
%A Houankpo, H..
%K cyclic redundant coding, programmable logic integrated circuit, Ethernet, information processing, computing
%J Vestnik of Astrakhan State Technical University. Series: Management, computer science and informatics
%D 2025
%N 2025
%P 8
%I Astrakhan State Technical University